By Munsif Vengattil, Aditya Kalra and Jane Lanhee Lee
NEW DELHI/OAKLAND, California (Reuters) -Big companies including a Foxconn joint venture that bid for India's $10 billion semiconductor incentives are struggling due to the lack of a technology partner, a major setback for Prime Minister Narendra Modi's chipmaking ambitions.
A planned $3 billion semiconductor facility in India by chip consortium ISMC that counted Israeli chipmaker Tower as a tech partner has been stalled due to the company's ongoing takeover by Intel (NASDAQ:INTC), three people with direct knowledge of the strategy said.
A second mega $19.5 billion plan to build chips locally by a joint venture between India's Vedanta (NYSE:VEDL) and Taiwan's Foxconn is also proceeding slowly as their talks to rope in European chipmaker STMicroelectronics as a partner are deadlocked, a fourth source with direct knowledge said.
Modi has made chipmaking a top priority for India's economic strategy as he wants to "usher in a new era in electronics manufacturing" by luring global companies.
India, which expects its semiconductor market to be worth $63 billion by 2026, last year received three applications to set up plants under the incentive scheme. They were from the Vedanta-Foxconn JV; a global consortium ISMC which counts Tower Semiconductor (NASDAQ:TSEM) as a tech partner; and from Singapore-based IGSS Ventures.
The Vedanta JV plant is to come up in Modi's home state of Gujarat, while ISMC and IGSS each committed $3 billion for plants in two separate southern states.
The three sources said ISMC's $3 billion chipmaking facility plans are currently on hold as Tower could not proceed to sign binding agreements as things remain under review after Intel acquired it for $5.4 billion last year. The deal is pending regulatory approvals.
Talking about India's semiconductor ambitions, India's deputy IT minister Rajeev Chandrasekhar told Reuters in a May 19 interview ISMC "could not proceed" due to Intel acquiring Tower, and IGSS "wanted to re-submit (the application)" for incentives. The "two of them had to drop out," he said, without elaborating.
Tower is likely to reevaluate taking part in the venture based on how its deal talks with Intel pan out, two of the sources said.
ISMC consortium partners Next Orbit Ventures did not respond to a request for comment. Tower and Intel declined to comment. Singapore-based IGSS and India's federal IT ministry did not respond to requests for comment.
SETBACK FOR VEDANTA
Most of the world's chip output is limited to a few countries like Taiwan, and India is a late entrant. Amid much fanfare, in September, the Vedanta-Foxconn JV announced its chipmaking plans in Gujarat. Modi called the $19.5 billion plan "an important step" in boosting India's chipmaking ambitions.
But things have not gone smoothly as the JV tries to hunt for a tech partner. The fourth source said Vedanta-Foxconn had got on board STMicroelectronics for licensing technology, but India's government had conveyed it wants STMicro to have "more skin in the game" - like a stake in the partnership.
STMicro is not keen on that and the talks remain in limbo, the source added. "From STM's perspective, that proposal doesn't make sense because they want India market to first be more mature," said the person.
Deputy IT minister Chandrasekhar told Reuters during the May 19 interview the Vedanta-Foxconn JV was "struggling currently to tie up with a technology partner."
STMicro declined to comment.
In a statement, Vedanta-Foxconn JV CEO, David Reed, said they have an agreement with a technology partner to transfer technology with licenses, but declined to comment further.
In a move seen to revive investor interest, India's IT ministry on Wednesday said the country will start re-inviting applications for chipmaking incentives. This time the companies can apply until December next year, as opposed to the initial phase where there was only a 45 day window.
"It is expected that some of current applicants will reapply and new fresh investors will also apply," Minister Chandrasekhar said on Twitter.